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Silicon Labs /Series1 /EFM32GG12B /EFM32GG12B410F1024GM64 /CMU /CTRL

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Interpret as CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)CLKOUTSEL00 (DISABLED)CLKOUTSEL10 (DISABLED)CLKOUTSEL20 (WSHFLE)WSHFLE 0 (HFPERCLKEN)HFPERCLKEN

CLKOUTSEL0=DISABLED, CLKOUTSEL2=DISABLED, CLKOUTSEL1=DISABLED

Description

CMU Control Register

Fields

CLKOUTSEL0

Clock Output Select 0

0 (DISABLED): Disabled

1 (ULFRCO): ULFRCO (directly from oscillator)

2 (LFRCO): LFRCO (directly from oscillator)

3 (LFXO): LFXO (directly from oscillator)

6 (HFXO): HFXO (directly from oscillator)

7 (HFEXPCLK): HFEXPCLK

9 (ULFRCOQ): ULFRCO (qualified)

10 (LFRCOQ): LFRCO (qualified)

11 (LFXOQ): LFXO (qualified)

12 (HFRCOQ): HFRCO (qualified)

13 (AUXHFRCOQ): AUXHFRCO (qualified)

14 (HFXOQ): HFXO (qualified)

15 (HFSRCCLK): HFSRCCLK

18 (USHFRCOQ): USHFRCO (qualified)
CLKOUTSEL1

Clock Output Select 1

0 (DISABLED): Disabled

1 (ULFRCO): ULFRCO (directly from oscillator)

2 (LFRCO): LFRCO (directly from oscillator)

3 (LFXO): LFXO (directly from oscillator)

6 (HFXO): HFXO (directly from oscillator)

7 (HFEXPCLK): HFEXPCLK

9 (ULFRCOQ): ULFRCO (qualified)

10 (LFRCOQ): LFRCO (qualified)

11 (LFXOQ): LFXO (qualified)

12 (HFRCOQ): HFRCO (qualified)

13 (AUXHFRCOQ): AUXHFRCO (qualified)

14 (HFXOQ): HFXO (qualified)

15 (HFSRCCLK): HFSRCCLK

18 (USHFRCOQ): USHFRCO (qualified)
CLKOUTSEL2

Clock Output Select 2

0 (DISABLED): Disabled

1 (ULFRCO): ULFRCO (directly from oscillator)

2 (LFRCO): LFRCO (directly from oscillator)

3 (LFXO): LFXO (directly from oscillator)

5 (HFXODIV2Q): HFXO divided by two (qualified)

6 (HFXO): HFXO (directly from oscillator)

7 (HFEXPCLK): HFEXPCLK

8 (HFXOX2Q): HFXO doubler (qualified) (doubling activated by HFXOX2EN=1)

9 (ULFRCOQ): ULFRCO (qualified)

10 (LFRCOQ): LFRCO (qualified)

11 (LFXOQ): LFXO (qualified)

12 (HFRCOQ): HFRCO (qualified)

13 (AUXHFRCOQ): AUXHFRCO (qualified)

14 (HFXOQ): HFXO (qualified)

15 (HFSRCCLK): HFSRCCLK

18 (USHFRCOQ): USHFRCO (qualified)
WSHFLE

Wait State for High-Frequency LE Interface
HFPERCLKEN

HFPERCLK Enable

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data